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  • CMOS Pll Synthesizers: Analysis and Design by Keliu Shu book cover
  • CMOS Pll Synthesizers: Analysis and Design by Keliu Shu book cover
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CMOS Pll Synthesizers: Analysis and Design

by Keliu Shu

PLL synthesizer design from system to circuit

$115.52 USD
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AlbakiReads Editorial

PLL synthesizer design from system to circuit

Keliu Shu’s book brings together fundamentals and advanced techniques for analyzing and designing phase-locked-loop (PLL) synthesizers at both system and circuit levels. A CMOS fractional-N synthesizer prototype serves as a concrete design example: the source describes a 2.4 GHz, sub-2 V implementation and highlights its phase-switching prescaler and loop-capacitance multiplier. The combination of broad design coverage and a specific implementation gives the book a practical engineering focus alongside its treatment of analysis methods.

Good fit for readers who enjoy

  • Researchers working on PLL synthesizer design and analysis
  • Industry engineers designing integrated circuits and frequency synthesizers
  • Readers seeking a system- and circuit-level reference on CMOS PLLs

Themes

PLL synthesizer analysis and designCMOS integrated circuitsFractional-N synthesisCircuit implementation

Based on publisher information and book metadata.

Book overview

This book presents both fundamentals and the state of the art of PLL synthesizer design and analysis techniques. A complete overview of both system-level and circuit-level design and analysis are covered. A 16mW, 2.4GHz, sub-2V, Sigma Delta fractional-N synthesizer prototype is implemented in 0.35m m CMOS. It features a high-speed and robust phase-switching prescaler, and a low-complexity and area-efficient loop capacitance mulitplier, which tackle speed and integration bottlenecks of PLL synthesizer elegantly. This book is conceived as a PLL synthesizer manual for both academia researchers and industry design engineers.

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I highly recommend to for anyone looking for inner clarity

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